Incorporating Two-Port Networks with S-Parameters into FDTD

A modeling approach for incorporating a two-port network with S-parameters in the finite-difference time-domain (FDTD) method is reported in this paper. The proposed method utilizes the time-domain Y-parameters to describe the network characteristics, and incorporates the Y-parameters into the FDTD algorithm. The generalized pencil-of-function (GPOF) technique is applied to improve the memory efficiency of this algorithm by generating a complex exponential series for the Y-parameters and using recursive convolution in the FDTD updating equations. A modeling example is given, which shows that this approach is effective and accurate. This modeling technique can be extended for incorporating any number of N-port networks in the FDTD modeling

FDTD Modeling Incorporating a Two-Port Network for I/O Line EMI Filtering Design

Electromagnetic interference (EMI) filters are often utilized on I/O lines to reduce high-frequency noise form being conducted off the printed circuit board (PCB) and causing EMI problems. The filtering performance is often compromised at high frequencies due to parasitics associated with the filter itself, or the PCB layout and interconnects. Finite difference time domain (FDTD) modeling can be used to quantify the effect of PCB layout and interconnects, as well as filter type, on the EMI performance of I/O line filtering. FDTD modeling of a T-type and π-type filter consisting of surface-mount ferrites and capacitors is considered herein. The FDTD method is applied to model PCB layout and interconnect features, as well as the lumped element components, including the nonlinear characteristics of ferrite surface-mount parts. The EMI filters with ferrites are included in the modeling by incorporating the time-domain Y-parameters of the two-port network into the FDTD time-marching equations. Good agreement between the FDTD modeling and S-parameter measurements supports the new FDTD algorithm for incorporating two-port networks

Investigation of PCB Layout Parasitics in EMI Filtering of I/O Lines

EMI filters are often utilized on I/O lines to reduce high-frequency noise from being conducted or coupled off the PCB and resulting in an EMI problem. However, layout parasitics are usually inevitable in practical circuit design, and the filtering performance may vary. In this study, the impact of the board layout on the filtering performance is investigated by |S21| measurements of sample PCB boards with different filter layouts. The finite-difference time-domain method is applied to model the boards, support the experimental work, and can be used to provide a means for conducting what-if engineering studies

Representation of Gyromagnetic Composite Media for FDTD Modeling

A composite media containing particles with a high internal field of magnetic anisotropy (hexagonal ferrites) useful for numerous EMC applications in a wide frequency band is considered. Effective constitutive parameters of a high-loss composite gyromagnetic media are represented in the Lorentzian form. It is convenient for the numerical analysis using the finite-difference time-domain (FDTD) algorithm with a recursive convolution procedure. The equations for the electric and magnetic field updating in such media are represented

Chloride Diffusivity and Life Prediction of Cracked RC Beams Exposed to Different Wet-Dry Ratios and Exposure Duration

Effects of crack width, wet-dry ratio, and exposure duration of wet-dry cycles on chloride ingress of RC beams were experimentally studied. Crack widths of 40, 70, 90, and 120 microns were, respectively, induced by three-point flexural loading and four wet-dry ratios (seawater spraying 1 d in one wet-dry cycle) of 1 : 3, 1 : 7, 1 : 11, and 1 : 15 were selected. Chloride contents of RC beams were tested every 32 d (or 16 d) of wet-dry cycles. Results show that chloride content increased significantly when crack width was larger than 90 microns and wet-dry ratio was 1 : 3, and it increased slightly when crack width was 120 microns and wet-dry ratio was 1 : 7, 1 : 11, and 1 : 15. The chloride content on steel bar surface became the largest when crack width was less than 90 microns and wet-dry ratio was 1 : 7, and while crack width was equal to or greater than 90 microns and wet-dry ratio was 1 : 3, it was the largest. Based on the testing results, chloride diffusion model and prediction model of residual service life of RC beams were suggested considering combined effects of crack width and exposure duration. The predicted residual service lives were corresponding well with experimental results and they decreased as crack width increased

A Common-Mode Current Measurement Technique for EMI Performance Evaluation of PCB Structures

An experimental technique that measures the common-mode current on a cable attached to a DUT for assessing EMI performance is introduced herein. The technique was applied to evaluate the EMI performance of a module-on-backplane configuration with different connectors and different connector pin-outs

DC Power Bus Design with FDTD Modeling Including a Dispersive Media

DC power-bus modeling in high-speed digital design using the FDTD method is reported here. The dispersive medium is approximated by a Debye model to account for the loss. A wide band frequency response (100 MHz-5 GHz) is obtained through a single FDTD simulation. Favorable agreement is achieved between the modeled and measured results for a typical DC power-bus structure with multiple SMT decoupling capacitors mounted on the board. The FDTD tool is then applied to investigate the effects of local decoupling on a DC power-bus. The modeled results agree with the results from another modeling tool, the CEMPIE (a circuit extraction approach based on a mixed-potential integral equation formulation) method

High-Performance Inter-PCB Connectors: Analysis of EMI Characteristics

Electromagnetic interference (EMI) coupling associated with inter-board connection is investigated. Two experimental techniques, based on |S21| measurements, including both common-mode current and near-field measurements, are reported. Both methods, as well as finite difference time domain (FDTD) modeling, were used as experimental and numerical tools for inter-printed-circuit-board (inter-PCB) connector evaluation. The EMI performance of a lab-constructed stacked-card connector, and a commercially available module-on-backplane connector were studied. EMI characteristics of the connectors are demonstrated by investigating a few aspects of the design: type of shield/ground blade for signal return, number and length of ground pins, signal pin designation, etc. Good agreement is achieved between the measurements and the FDTD modeled results

Insertion Loss Reduction using Rounded Corners to Mitigate Surface Roughness Effect in Pcb Transmission Lines

Signal integrity (SI) can be interpreted as a measure of the distortion of the incident pulse, which is attributed to various contributors, e.g., inter-symbol interference (ISI), crosstalk, jitter, etc. The channel insertion loss is generally the most critical concern in SI designs, since it determines the working bandwidth of a high-speed channel, and the bandlimited channels are known as the root cause of ISI. At the tens of Gigabit rates in use today, PCB transmission lines may have appreciable losses, which can be divided into frequency-dependent dielectric loss and conductor loss, and noticeable amount of losses can be generated at high-frequencies due to the skin effect and copper rough surfaces. In order to reduce the additional conductor loss due to the surface roughness, the employment of low-profile copper foils is a common practice in high-speed digital design. However, this existing method is not cost-effective. In this paper, insertion loss reduction using rounded corners are proposed and verified using both 2D and 3D full-wave simulations for the first time. Rounded corners can mitigate the increased insertion loss due to copper surface roughness in PCB transmission lines and can be applied in high-speed interconnect designs to increase eye margins. The impact of applying rounded corners on far-end crosstalk is also discussed

Modeling EMI Resulting from a Signal Via Transition Through Power/Ground Layers

Signal transitioning through layers on vias are very common in multi-layer printed circuit board (PCB) design. For a signal via transitioning through the internal power and ground planes, the return current must switch from one reference plane to another reference plane. The discontinuity of the return current at the via excites the power and ground planes, and results in noise on the power bus that can lead to signal integrity, as well as EMI problems. Numerical methods, such as the finite-difference time-domain (FDTD), Moment of Methods (MoM), and partial element equivalent circuit (PEEC) method, were employed herein to study this problem. The modeled results are supported by measurements. In addition, a common EMI mitigation approach of adding a decoupling capacitor was investigated with the FDTD method